SEGGER Evaluation Software for ST STM3240G-EVAL
SEGGER Evaluation Software
Included components:
Product | Supported features |
---|---|
emPower OS | |
BASE + AntiAliasing, Font Converter, Memory Devices, Simulation |
Download SEGGER Evaluation Software for ST STM3240G-EVAL and SEGGER Embedded Studio
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Converting ST-LINK on-board into a J-Link
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SEGGER Embedded Studio
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SEGGER SystemView is a real-time recording and visualization tool that reveals the true runtime behavior of an application, going far deeper than the insight provided by debuggers. This is particularly effective when developing and working with complex systems comprising multiple threads and interrupts: SystemView can ensure a system performs as designed, can track down inefficiencies, and show unintended interactions and resource conflicts.
Data Sheets
ST STM3240G-EVAL
- STM32F417IGH6 microcontroller
- 16 Mbit SRAM
- 1 Gbyte or more MicroSD card
- Boot from user Flash, system memory or SRAM
- Both ISO/IEC 14443 type A and B smartcard support
- I2C compatible serial interface 64 Kbit EEPROM, MEMS and I/O expander
- IEEE 802.3-2002 compliant Ethernet connector
- Two CAN 2.0 A/B channels on the same DB connector
- RS-232 communication
- IrDA transceiver
- USB OTG (HS and FS) with Micro-AB connector
- Inductor motor control connector
- I2S Audio DAC, stereo audio jack for headset
- 3.2" 240x320 TFT color LCD with touch screen
- 4 color LEDs
- Camera module and extension connector for ST camera plug-in
- Joystick with 4-direction control and selector
- Reset, wakeup, tamper and user button
- RTC with backup battery
- Extension connector for daughterboard or wrapping board
- JTAG, SW and trace debug support
- Embedded ST-LINK/V2
- Five 5V power supply options: Power jack, USB FS connector, USB HS connector, ST-LINK/V2 or daughterboard
STM32F417IGH6
- ARM 32-bit Cortex-M4F CPU with FPU
- Adaptive real-time accelerator (ART Accelerator™) allowing 0-wait state execution from Flash memory
- Frequency up to 168 MHz
- Memory protection unit, 210 DMIPS/1.25 DMIPS/MHz (Dhrystone 2.1), and DSP instructions
- Up to 1 Mbyte of Flash memory
- Up to 192+4 Kbytes of SRAM including 64-Kbyte of CCM (core coupled memory) data RAM
- Flexible static memory controller supporting Compact Flash, SRAM, PSRAM, NOR and NAND memories
- LCD parallel interface, 8080/6800 modes
- Clock, reset and supply management
- 3×12-bit, 2.4 MSPS A/D converters: up to 24 channels and 7.2 MSPS in triple interleaved mode
- 2×12-bit D/A converters
- General-purpose DMA: 16-stream DMA controller with FIFOs and burst support
- Up to 17 timers: up to twelve 16-bit and two 32-bit timers up to 168 MHz, each with up to 4 IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- Serial wire debug (SWD) & JTAG interfaces
- Cortex-M4F Embedded Trace Macrocell™
- Up to 140 I/O ports with interrupt capability
- Up to 3 × I2C interfaces (SMBus/PMBus)
- Up to 4 USARTs/2 UARTs (10.5 Mbit/s, ISO 7816 interface, LIN, IrDA, modem control)
- Up to 3 SPIs (37.5 Mbits/s), 2 with muxed full-duplex I2S to achieve audio class accuracy via internal audio PLL or external clock
- 2 × CAN interfaces (2.0B Active)
- SDIO interface
- USB 2.0 full-speed device/host/OTG controller with on-chip PHY
- USB 2.0 high-speed/full-speed device/host/OTG controller with dedicated DMA, on-chip full-speed PHY and ULPI
- 10/100 Ethernet MAC with dedicated DMA: supports IEEE 1588v2 hardware, MII/RMII
- 8- to 14-bit parallel camera interface up to 54 Mbytes/s
- Analog random number generator
- CRC calculation unit, 96-bit unique ID
- RTC: subsecond accuracy, hardware calendar